For this demo I used 3 of the counter timers on the STM32F372 to generate pulse trains of differing frequencies, made more interesting by adding 2 things:
(1) Chaining of timers using synchronization. Surprisingly, even when 2 timers driven by the onboard clock of the F372 are started at the same time, within 30 secs they have often drifted apart by as much as 500mS. This could be caused by differing path lengths on the SoC. The problem can be solved by using the on-board triggering mechanism which allows one timer to generate triggers that will drive another at selectable events. I used this feature to reset the second timer to the first on every cycle, thereby minimizing drift.
(2) Generating a periodic interrupt using the CortexM3 core SYSTICK clock. The SYSTICK clock only has a couple of configuration registers and is much simpler than the CTC Timers. Easy.
The programmers’ models for the timers used in the STM32F1xx and F37x series are similar. I guess ST reused the same IP blocks… There
Though many eval boards come with an embedded JTAG-USB interface, I still like to use a separate purpose-built JTAG debug box.
If you pick the right one:
- It can be used with many boards and SoCs. Once set up, one debug toolchain works for many projects.
- You can use it to debug MCUs on bread-boarded projects. You will need to make a hacked SWD cable like the one I show in this post.
- Not that expensive. I picked up a Segger JTAG EDU on a home-use deal for $60. I remember the early days at ARM when we first launched our “EmbeddedICE” box; the price then was over $1K….Today you can get some very cheap $20 knock offs from China on EBay and AliExpress. These may or may not work, but I believe it not worth my time to rely on dodgy tools with questionable software.
- It works natively with Mac OSX. At least the Segger version does. I don’t need to run Fusion, Parallels or Virtual Box.
- Does not require special USB drivers etc. The Mac version works by looking like a TCP device and speaking IP.
- Supported directly under Eclipse. Again no special driver required
- Supports SWD or full JTAG
(1) Connection to the target
The first thing you will need is a SWD cable. I made one out of some 20 core ribbon cable and a 20 pin IDC box connector. The ARM documentation on SWD pinouts is highly ambiguous since they talk about the pins to a “connector”. What’s a connector? Do they mean the plug (male) or socket (female)? I figured out the Segger pin out by using a Salaea Logic Analyzer:
(2) Get the Segger software tools working
On a Mac, this is as simple as starting the JLinkExe terminal application in the Segger Application folder. Don’t try and use the JLinkGDBServer app from terminal.
If all is well, JLinkExe reports something like this:
Note how JLinkExe switched automatically to SWD. This works most of the time, but not always. It depends on whether your target device is “known” to the box or not. If it is not known, you can fix this by