Decoding PWM using cross-coupled timers on the STM32F372

The STM32F1xx has some neat features that allow you to cross-couple timers in interesting ways.

In the last post on timers, I synchronized 2 timers by using a master-slave configuration where the master resets the slave on every cycle. This time I use 2 cross-coupled channels of one timer in order to measure a PWM train frequency and mark:space ratio.

The trick to measure PWM is to use one counter to measure the period and the second to measure mark time, the latter reset by the first period counter on every cycle:

PWM

Here’s how it works:

The pulse train is applied to the pin of Timer 1 channel 1 (T1C1) T1C1 edge detector outputs rising and falling edge signals as shown below. The MUXs are cleverly designed so that you can use the edge signals from one channel

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Timer, ADC and DMA autonomous data logging …. no CPU

This post pulls together the work from prior posts on the timers, ADC, DMA and GPIU for the STM32F372.

The idea is to get the MCU to do periodic ADC measurements and store the results away on its own without needing the CPU to intervene. This means no interrupts or polling, just the peripheral blocks working together on their own. This type of design is becoming more and more common in the low power world where the CPU and its subsystem is kept asleep, leaving the peripherals to do their job with the CPU only woken when some control needs doing.

The demo works like this:

ADC_DMA demo

Timer 2 is set up to produce a PWM train with a 5 second period. I use 2 channels in the same counter with the same mark:space ratio settings so that the first can drive the ADC whilst the second flashes an LED so that I know something is happening…

Timer2 has a nice feature where you can set it to send a Trigger Event at each Update Event (UEV). Here I set the UEV to be when the counter spills over the period

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PWM with synchronized Counter Timers and CortexM3 Systick

For this demo I used 3 of the counter timers on the STM32F372 to generate pulse trains of differing frequencies, made more interesting by adding 2 things:

(1) Chaining of timers using synchronization. Surprisingly, even when 2 timers driven by the onboard clock of the F372 are started at the same time, within 30 secs they have often drifted apart by as much as 500mS. This could be caused by differing path lengths on the SoC. The problem can be solved by using the on-board triggering mechanism which allows one timer to generate triggers that will drive another at selectable events. I used this feature to reset the second timer to the first on every cycle, thereby minimizing drift.
(2) Generating a periodic interrupt using the CortexM3 core SYSTICK clock. The SYSTICK clock only has a couple of configuration registers and is much simpler than the CTC Timers. Easy.

The programmers’ models for the timers used in the STM32F1xx and F37x series are similar. I guess ST reused the same IP blocks… There

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Breadboard breakout board for 48pin QFP STM32F100

Quick and simple project to make an adapter PCB to use a QFP packaged MCU on a traditional through-hole breadboard.

I ended up making a double-sided PCB to support 2 different QFP sizes. One side set up for 48 pins, the other for 32pins. Usage is to populate one side or the other, not both….

Screenshot 2014-08-13 17.56.56

Simple pin-out to two standard 24-pin headers. No on board components such as decoupling capacitors.

Here is the board in action on a breadboard and loaded up with a 48-pin STM32F100C8:

IMG_3872_safe

Eagle files for the board are on GitHub here.

 

Cortex-M bring up. Post#2: this time with simple software infrastructure

I have found that basic example code from MCU suppliers is often too complex. Vendors want to write one example for their entire product range, so you often end up with a spaghetti of code and linker script that weaves in CMSIS, USB, drivers for fancy peripherals and whatever else. Even if you wanted to strip it down to basics, you would have to deal with multiple file dependencies in a web of directories that make the job harder than it should be.

For new board bring up, once I have shown sign of life using low level JTAG (see this post), the next thing I like is the simplest possible software set-up that I can get working.

Nice theory. Where do I download some code? I was surprised at how much I had to search to find anything useful. So this post has a simple example I made for a new STM32F100C8 board. It should work or at least help for many CortexM0 or M3 MCUs.

In the below diagram, the pieces of code we need to supply for this simple approach are in blue:

Screen Shot 2014-08-11 at 9.09.39 PM

There are countless

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Simplest Cortex-M bring up. Post#1: a no code approach

Powering up a new board design or even skiing off-piste with an eval board without vendor-suppled code? This post shows a way to look for first signs of life without depending on working debug toolchain or working target software.

I use a Segger JTAG probe that I covered in a previous post.

Some recent eval boards like the one for Nordic Micro’s nRF51822 ship with an on-board USB debug connection that has a USB-JTAG decoder chip on board. This board uses the same Segger driver as their JTAG box embedded in the decoder, so the below approach should also work.

Segger JLINK application driver has a series of useful commands for examining directly addresses in memory:

  • mem          Read memory. Syntax: mem , (hex)
  • mem8        Read 8-bit items. Syntax: mem8 , (hex)
  • mem16      Read 16-bit items. Syntax: mem16 , (hex)
  • mem32      Read 32-bit items. Syntax: mem32 , (hex)

Since many MCUs have a factory-programmed ID register, you can use JTAG to read this value and check for signs of life.

To start with, I target a STM32F100C8. This MCU has a register at 1FFFF7E0 hex containing a 16-bit value with the flash size of the MCU. This is covered in the STM32F100 programming manual on

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